Electronic changing of number bases



4 Sheets-Sheet 1 J. D. DlLLON ETAL Oct. Z2, 1957 ELECTRONIC CHANGING oF NUMBER BASES Filed July 25. 1952 Oct. 22, 1957 J. D. DlLLoN ETAI- 2,810,518

ELECTRONIC CHANGING OF' NUMBER BASES Filed July 25, 1952 4 Sheets-Sheet 2 JBZ Oct. 22, 1957 J. D. DILLON ETAL 2,810,518

ELECTRONIC CHANGING OF NUMBER BASES Filed July 25. 1952 4 sheets-sheet s Oct. 22, 1957 J. D. DILLON ETAL 2,310,518

ELECTRONIC CHANGING OF NUMBER BASES 4 Sheets-Sheet 4 Filed July 25. 1952 Bye-Mam ,74E/vf# LUI-AL United States Patent O ELECTRONIC CHANGING F NUMBER BASES lohn D. Dillon, Melbourne, Fla., and Byron 0.

Marshall, Jr., Pittsburgh, Pa. Application July 25, 1952, Serial No. 301,008 4 Claims. (Cl. 23S- 61) (Granted under Title 35, U. S. Code (1952), sec. 266) The invention described herein may be manufactured and used by or for the Government for governmental purposes without payment to us of any royalty thereon.

This invention relates to electrical apparatus for converting numbers expressed in one radix to numbers expressed in a different radix.

Although many types of apparatus have been proposed for the purpose of converting numbers expressed in one radix to numbers expressed in a dilerent radix such apparatus has been very complicated, very bulky and subject to mechanical failures.

It is an object of this invention to provide an apparatus for converting numbers expressed in one radix to numbers expressed in a different radix wherein the apparatus is of simple construction.

It is another object of this invention to provide an apparatus which can be used for converting a number expressed in one radix to a number expressed in a diier* ent radix and then by simple adjustment of the apparatus the same apparatus may be used to convert a number expressed in a second radix to a number expressed in a different radix.

It is still a further object of this invention to provide an apparatus for converting numbers expressed in one radix to a number expressed in a different radix wherein the time involved for the conversion of numbers will be a minimum.

These objects as well as other objects, features and advantages of the apparatus of this invention will be best understood by the following description when taken in conjunction with the drawings wherein:

Fig. 1 is a simplified schematic circuit diagram of one embodiment of applicants apparatus for changing of number bases.

Fig. 2 is graph of voltage wave forms at various points in the apparatus of Fig. 1.

Fig. 3 is a block diagram of another embodiment of l applicants apparatus for changing of number bases.

Fig. 4 is a schematic diagram of an apparatus which may be used as the gate generator shown in block form in Fig. 3.

Fig. 5 is a schematic diagram of an apparatus which may be used as the column adder shown in block form in Fig. 3.

Fig. 6 as a chart to show the sequence of operation of the counting tubes of the column adder of Fig. 5.

Fig. 7 is a circuit diagram of a bank of indicating tubes which may be operated by the column adder of Fig. 5.

In order that the apparatus of this invention may be more clearly understood, a brief discussion of the theory of numbers relating to the principles of this invention will be first presented.

Any number N may be presented as a number in the base or radix r by the expression:

A number in the base or radix 10 (decimal number) may be presented by the expression:

where the coeicients An, A11-1, A1, Ao are numbers from 0-9.

The usual decimal notation for numbers is the set of coetiicients An An placed side by side with higher order coeflicient to the left.

The representation of a number in the base or radix 2 (binary number) may be presented by the expression:

where the coefficients An, A11-1, A1, Ao are either l or 0 depending upon whether or not the particular power of 2 to which the given coefficient is a part appears in the number.

To find the binary number equivalent to a given decimal number, it is iirst necessary to determine what is the maximum power of 2 (this Will correspond to 2n in Expression 3 above) which is most nearly equal to but not greater than the decimal number. A number 1 is then entered which corresponds to the coefficient An in the Expression 3 above, this number will be the first appearing digit of the binary number. The second appearing digit of the binary number will be 0 or 1 depending on whether or not the next lower power of 2 is greater or less than the diierenee between the given decimal number and the above mentioned maximum power of 2, if it is greater, the next appearing digit will be 0, if it is less it will be 1.

Following is a method for changing a decimal number to its equivalent binary number:

Assuming the decimal number is 217. A table such as this may rst be prepared:

Since 27 is the maximum power of 2 which is most nearly equal to but not greater than 217, An 2n in Expression 3 above will become 17x27 and the first appear ing digit of the binary number will be 1. The difference between 217 and 27 is 217- 128 or 89 which is greater than 26 so the next appearing digit will be 1. The difierence between 89 and 26 is 89-64 or 25 which is less thanl 25 so the next appearing digit is 0. Since 25 is greater than 24, the next appearing digit will be 1. The difference between 25 and 24 is 25-16 or 9 which is greater than 23 so the next appearing digit will be 1. The difference between 9 and 23 is 9-8 or 1. Since 1 is less than 22, the next appearing digit will be 0. Since 1 is less than 21, the next appearing digit will be 0. Since 1 is equal 20, the next appearing digit will be 1. Therefore, the binary number equivalent to the decimal number 217 is 11011001.

To reverse the above process, that is, to find the decimal number which is the equivalent of a given binary number, it is only necessary to add the powers of two which have a coecient of 1. For example, to nd the decimal number equivalent to the binary number 11011001 (which is the above derived binary number) it is merely necessary to add as follows:

From this discussion it will be apparent that if a tlme period equal tothe power of 2 corresponding to the digit of the binary number was assigned and the individual time periodsadded, the total time period would be equal to the binary number and if such time period were used to gate a source ofY continuous pulses of unit time, and thus produce a series of pulses the number-of which would be equal to the binary4 number, the gated pulses could be used* to operate anyY suitable register, recorder or any other apparatus.

It will be understood that although the apparatus of this invention is capable of converting any number expressed in any given radix to its corresponding number expressed in any dilerent radix, the invention will be described with reference to conversion of numbers expressed in any exemplary radix to its corresponding number expressed in a different specific radix.

Referring now to Fig. 1 where apparatus is shown which is. capable of changing a number expressed in base 2 to a number expressed in base 10, it will be understood of course that is merely an example and the apparatus could be so constructed as to change a number expressed in any given base toa number expressed in anyother base, a plurality of gate generators 1, 2, 3, 4' and 5 are provided, one gate generator for each digit of the binary number to be converted. The output of each of the gate generators 1, 2, 3, 4 and 5 is fed to the input grid of cathode follower 6 through electron tubes 7, S, 9,.10.and 11 respectively, and the output of that cathode. follower is fed to the input'grid of tube 12. A counting pulse generator 13 has its output fed to electron tube 14 through a suitable delay line 15. Tubes 12 and 14 and their .associated circuits form a gate or coincidence stage whose output is fed to a decimal counter.

The operation of Fig. 1 isfastfollows: selector switch 16 and selector switch 17 areganged together and will be in the position shown in the-drawing when the binary digit assigned to the gate generator'l is Zero and will be in the opposite position whenvthezbinary digit assigned to the gate generator 1 is One. The-.selector switches 18, 19 associated with gate generator 2,the selector switches 20, 21 associated with the gate. generator 3, the selector switches 22, 23 associated with the gate generator 4 and the selector switches 24, 25 associated with gate generator are operated in the same manner as the selector switches16 and'1'7'of gate generator 1, that is, the selector switches associated with any given gate generator will be in theY position shown in the drawing when the digit assigned to that given generator is Zero and will be in the opposite position when the binary digit assigned to that given generator is One. Each gate generator has a pulse output whose duration is determined principally by the value of resistor R and capacitor C associated with that generator.

When the control switch 26-is'closed, a potentialis applied to bus 27 suihcient to cause the counting pulse generator 13 to produce an output consisting of a train of negative pulses having a repetition period t and also the potential appearing on the bus 27 is suliicient to cause operation ofthe gate generator 1 provided its associated selector' switch is in theposition opposite tothat-shownV in the drawing. Assuming that the selector switches 16, 17 are inthe opposite posiiton to the position shown in the drawing, the gate generator 1 willproduce an output pulse having a duration of One t and this, output isk ap plied to the input grid of cathode follower 6 through electron tube 7 and this pulse of suicient magnitude to cut off tube 12 which is normally conducting. When tubeV 12 is cut oi the negative p ulse from the output of the counting pulse generator produces a positive pulse in the output of the gate or coincidence stage which output causes operation of the decimal' counter. When the gate generator 1 operates, a negative pulse having the same duration as the output pulse of that gate generator is fed through a ditferentiatingcircuit 28 and through the se- 4 lector switch 17 to the conductor 27 and the positive pip coinciding with the trailing edge of the differentiated negative pulse is of suicient magnitude to cause operation of gate generator 2 provided its associated selector switches 1S, 19 are in the position opposite to the position shown in the drawing.. The" gate generator 2 upon operation produces a positive pulse having a duration of Two t which pluse will cause tube 12 to be made nonconducting and thus permit two positive pulses to. be produced at the output of the gate or coincidence stage and these two positive pulses cause operation of the decimal counter. The gate generator 2 as described withrreference to gate generator 1' also produces a negative pulse which is fed to a dilerentiating circuit 29' and the positive pip coin* ciding with the trailing edge of the differentiated negative pulse has suicient magnitude to cause operation of gate generator 3 provided itsV associated selector switches 20, 21 are in the position opposite to the position shown in the drawing. GrateY generator'3 produces an output pulse having a duration of 4t and will cause four positive pulses to be producedV at the output ofthe gate or coincidence stage which will thencause operation of the decimal counter 11. Gate generators 4V and 5 function in the same manner as above described' withr relation to gate generators 1, 2 and 3, however, gate generator 4 produces a pulse having a time durationv of 8-t and the gate generator 5 has a time duration of'16t`.

Assuming now itis desiredto convert the'binary numK ber 10111 'to its equivalent decimal number, selector switches 16, 17 will be closed, the 'selector switches 1S, 19 will bel closed i. e. in the position opposite to that shown` in Fig. 2, theselector. switches 20, 21I will be closed, the selector switches 22, 23 will be open and the selector switches 424, 25 will be closed. Upon Yoperation of the' control switch 26i the counting pulse generator startsY producing a train of negative pulses. VFPhese-pulses are delayed byA a' predetermined amount inV delay line 15- to produce wave'form- 101 of- Fig. 2'. Thearnount of delay introduced by the delay line 15 is selected to be sufficient to insure` arrival of the pulses from the counting pulse generator at thegate or coincidence stage during the pulsel time of the-pulses producedV by the gate generators 1, 2, 3, 4 and 5. The presence of the control potential on bus 27 causes the gategenerator 1 to produce an output pulse as shown by wave form- 102 and this pulse is inverted as shown by wave form 103 by tube 7. The ditferentiator'cireuit 28 produces anoutput wave form 104 and the trailing edge pip 105 causes gate generator 2 to produce an output wave Vform- 106` which is inverted by tube 8 and' produces a wave form 107. The differentiator circuit 29 produces anoutput wave worm 108 and the trailingedge pip 109 causes gate generator 3 to produce an output wave form 110 which is inverted by tube 9- to produceawave formC 111-. The output of differentiator 304 produces a wave form 112 and the trailing edge pip 113 will cause gate generator 5 to produce an output wave form 1'145whichis inverted by tube 1,1 to produce wave form 115. ,Wave forms 103, 107, 111 and'115v are combinedin the input Ygrid of cathode follower 6^andthat input wave form 1-16Vwill' causev 23 of the'pulses from the counting pulse generator to" be gated through thel gate or coincidence Vstage andwillproduce anvoutput wave form 117 and these pulses-will cause operation of the decimal* counter 33. It will thus be seen that the binary number 10111! will produce 23`pulsesto be counted by the decimal counter which is the decimal number equivalent to thatI There will'usuallylbejseveral pulses inthe output ofv the gate or coincidence stage thus causing the output (in the previous case, decimal) counter to have several digits, or one might say that the output counter has several columns, each of which may be occupied by a digit from Zero to (r-1), where r is the base of the `output number. It is possible, therefore, to decrease the time required for the conversion olf numbers by a considerable factor by gating pulses not only to the lowest order column of the output counter but to all columns simultaneously, with carriers between columns interspersed between the input pulses. For example, the binary number TABLE 1 Decimal Number of pulses gated Equivalent to Decimal column# Binary Place of Binary Position As an example of this` type of operation, suppose the binary number 101101. were to be changed to decimal notation. Let these digits be identied by letters ras follows:

f e d c b a 1 0 1 l 0 1.

These digits will gate the following number ot pulses to the decimal counter:

Number of Pulses to" Binary Place Tens Units Column Column The decimal counter will thus read in the units column and 3+1=4 in the tens column for the correct decimal ators 301 through 311 is connected to operate gate or coincidence lstage 312 to permit pulses from the counting pulse generator 313 to operate the column l apparatus of the decimal counter 314. A second bank of gate generators 315 through 321 combine to produce a gating operation of gate 322 which will gate the output pulses from the counting pulse generator 313 to operate the column 2 apparatus `of the decimal counter 314. A third bank of gate generators 323 through 326 combine to produce a pulse which will operate gate 327 to gate pulses from the counting pulse generator 313 to operate the column 3 apparatus of the decimal counter 314 and a fourth bank of gate generators 328 through 331 are provided to operate gate 332 .to gate the output pulses from the counting pulse generator 313 to the column 4 apparatus of the decimal counter 314.

From Table 1 above it will be apparent that the binary positions B1, B2, B3 and B4 will require only one gate generator since those binary places will only gate pulses to the column l apparatus of the decimal counter therefore in Fig. 3 gate generator 301 produces an output pulse of lt duration when the assigned binary place B1 is a One, and likewise gate generators 302, 303 and 304 will produce their respective pulses of 2t, 4t and St duration. Since the binary place B5 requires that pulses be gated to both column 1 and column 2, gate generator 305 is provided to produce a pulse of 6t duration which will gate 6 pulses to the column 1 apparatus and gate generator 315 is provided to produce a pulse of 1t duration to gate 1 pulse to the column 2 apparatus of the decimal counter. It will be noted also from Table 1 above that the binary places Bs and B7 also require pulses to both the column 1 and column 2 apparatus and therefore gate generator 306 and gate generator 316 have been provided for the B6 binary place and gate generators 307 and 317 have been provided for the B7 binary place. The selector switches have been identified in the drawing by B1, B2, Ba, etc., corresponding to the binary places indicated in Table 1 above. Each of the banks of gate generators illustrated in the drawing have been shown as incomplete since the number of gate generators in `a given bank which :are required for any particular apparatus will be determined by the number of binary places which the apparatus will be capable of handling and likewise the number of banks of gate generators will also be `cletenmined by the number of binary places which the particular apparatus will be capable of handling, the number of banks needed being equal to the number of places of the decimal number which is equal to the highest order place of the highest binary number to be converted. Furthermore the number off column indicating apparatus will be dependent upon the number of binary places which the particular apparatus is capable `of handling. In Table l above, binary places up to B14 have been indicated and since binary places B11 through B14 require gating of the pulses to 4 columns of the decimal counter, 4 banks of gate generators will be neces-sary to handle all of the binary places up to B14.

The apparatus of Fig. 3 operates somewhat in the same manner as the apparatus in Fig. 1, that is, upon operation of the control switch 333 the counting pulse generator 313 starts producing a train of negative pulses. These pulses are delayed in delay line 334, a sufficient amount to insure the arrival of the pulses from the counting pulse generator at the gate circuits during the pulse time of the pulses produced by the gate generators. The presence of the control potential on the bus 33S causes the gate generator 301 to produce an output pulse provided its selector switch B1 is in the position opposite to that shown in the drawing. The remainder of the gate generators of the tirst bank ot generators operate as described above with respect to Fig. 1 except that the duration of the pulses of the gate generators will be of a duration such 'as are indicated in Fig. 3. Since all of the banks of gate 7 generators operate in the same manner no further descrip tion will be necessary. The gate circuits 312, l322, 327 and 332 may be of any suitable construction such as the gate or coincidence stage illustrated in Fig. 1. Y

The details of the gate generators of Fig. 3 are shown in Fig. 4 and it is pointed out that the Vvalue of resistor R and the value of capacitor C for any particular gate generator will be selected such that the particular generator will produce an output pulse of a duration according to that indicated in Fig. 3.

Although the apparatus of the various columns of the decimal counter may `be of any suitable construction, a preferred embodiment of those column counters is illustrated in Fig. 5.

Referring now to Fig. 5, there are sheets 501 through 510 inclusive of which 5, namely, 562, 503, 505, 507 and 509 are normally conducting. Tube 509 being normally conducting holds the potential at potentiometer point between resistances 511, 512 to a comparatively low positive potential. Likewise the potentiometer point between resistances 512 and S13 which is connected to the screen grid of tube 501 is held d own to the point where tube 561 is blocked and will not transmit the incoming pulses. Tube 502 however will invert the incoming positive pulse into a negative pulse since the rise in the cathode-anode current flowing through resistance 514 causes a drop in the potential of the anode. Hence a positive pulse incoming to tube 502 appears on the suppressor grid of tube 509 as a negative pulse. Tube 509 is therefore rendered nonconducting and hence under control of condenser 515 the condition of tubes 509 and 510 is reversed from its original condition, tube 509 now being nonconducting and tube 510 becoming conducting.

The first of the incoming pulses thus reverses the condition of tubes 509 and 51) vand by raising the potential of the .point between resistances 512 and 513 renders the tube 501 responsive to following pulses. At the same time a similar potentiometer point controlled by 510 falls in potential and Vrenders tube 502 unresponsive to following p ulses.

The second pulse 4thus'controls tube 501 and due to the resistance 516 now is inverted into a negative pulse to the suppressor grid of tubes 503 and 504 so that the condition of the tubes 503 and 504 is reversed, tube 504 becoming .conducting and tube 503 becoming nonconducting.

The third pulse again reverses the condition of tubes 503and'504 .rendering tube 503 conductive and tube 504 nonconducting and at the same time effects the necessary pair of tubes 505 and 506 rendering tube 505 nonconducting and tube 506 conducting.

The fourth pulse now reverses the condition of tubes 503 and 504 rendering tube 503 nonconducting and tube 504 conducting.

The fth pulse now reverses the condition of both pairs 503 and 504 and `505 and 506 rendering tubes 503 and 505 conducting and tubes 504 and 506 nonconducting. At the same time a negative pulse is applied through condenser 17 tothe suppressor grid of tube 507 and through the condenser 518 to the suppressor grid of tube 51,0. vThus the fifth pulse reverses the condition of tubes 507 and 508 rendering vtube 507 nonconductive and tube 508 conducting. The negative lpulse applied to the suppressor grid of'tube 510 will reverse the Vcondition of tubes -509 and 510 rendering tube 509 conducting and tube 510 nonconducting. Tubes 501 and 502 are also reversed tube 501 being -made nonconducting and tube 502 being made conducting.

The sixth pulse will reverse the condition of tubes 509 and VS10 rendering tube 509 nonconducting and tube 514) conducting. Tube 501 .is now Arendered vconducting and tube502 nonconducting as before. l

The seventh fpulse reverses .the condition of tubes 503 and5204renderingtube 504 conducting and tube S03 nonconducting f The eighth pulse reverses the condition of tubes 503 and 504 and -also the tubes 505 and 506 rendering tubes 503` and v506 conducting and tubes 504 and 505 nonconducting.

The ninth pulse reverses the condition of tubes 503 and StB-@rendering tube 503 nonconducting and tube 504 conducting. It will now be found that all tubes are 4the reverse of normal, that is, tubes 510, 50.4, 506, 508 and 501 are now conducting and tubes 509, 503, 505, 507 and 502 are nonconducting.

The tenth pulse results in a change back to normal. Here as in the fth pulse, a negative pulse is transmitted to tube 510 so that the condition of the pair of tubes 509 and 510 is reversed.

On this tenth pulse as tube 508 becomes nonconducting its anode changes from a comparatively low positive potential to a comparatively high positive potential. This sudden rise in potential appears on the outgoing conductor 519 and thus constitutes a positive pulse which will be used as a carry over pulse to be applied to the next higher order column apparatus of the decimal counter.

The above described action of the tubes may be visualized by the help of the chart, Fig. 6. Where a solid black dot appears in the chart it represents a comparatively high positive potential on the potentiometer points associated with the various tubes. In some cases there will be an outline dot and then a dotted line to a solid dot to indicate that the result of the pulse was to render the .tube with the outlined dot conducting (comparatively low positive anode potential) and the other nonconducting (comparatively high positive anode potential). Thus f pulse numbered l results in the reversal of the condition of tubes 509, 510.

The chart of Fig. 6 thus depicts the permutation code whereby 10 Various combinations of the conditions of tubes 503 to 51|@ inclusive may be used to record the l0 digits. Fig. 6 also depicts the out pulse transmitted on the 10th pulse in the form of a graph.

Fig. 7 shows a set of 10 glow lamps which may be operated to display the digit which may have been registered at any time on the device of Fig. 5. In this ligure there are eight lines having terminals a, b, c, d, e, f, g -and h. These correspond to similarly designated terrninals in Fig. 5 and are intended to indicate that these lines are connected to the corresponding potentiometer points. Thus the glow tube 700 is connected through a network of 4 resistors 701, 7b2, 703 and 704 leading to the potentiometer points of tubes 510, 504, 506 and 508 respectively so that when these tubes are simultaneously nonconducting and their anodes are all at a comparatively high positive potential the resultant potential applied to the control electrode of the glow vtube 700 is suicient to cause this tube to glow. By the same token the corresponding resultant potential for each of the remaining 9 glow tubes is lower beyond the operating point for those tubes.

In this manner a train of a large number of pulses serially related may be counted in accordance with the commonly used decimal system, the number iinally being displayed being that of the total number counted.

Referring now to Fig. 3, the carry over pulse from each of the column apparatus is delayed through delay lines 336, 337, 338 by a sufhcient amount to insure that these carry over pulses are interspersed with the pulses fed to the particular column apparatus from the output of the -gate circuits 3];2, 322, 327, 332.

Although specific lapparatus embodying this invention has been shown and described, it will be understood that such a showing has been made in order that the invention maybe more completely understood, however, such ashowing is not to be considered as in any way limiting this invention. Many other types of apparatus may be used to carry out jthis invention as well as many modifications, additions and omissions from the particular apparams .shown and described.

What is claimed is:

1. Apparatus for changing a number expressed in the form Anrn-kAn-irn-l-k. Azrll-Air-l-Acawhere An. A114, A2, A1, Ao are coefficients having a value from to r-l and r is the radix of the number, to a number expressed in the form where Bn, B11-1, B2, B1, Bo are coefficients having a value from 0 to lvl-1 and M is the radix of the number, said apparatus comprising means for producing a series of first voltage pulses having a repetition period of t, a plurality of voltage pulse generator means for producing a plurality of second voltage pulses corresponding to the various orders of the expression the time duration of the voltage pulse corresponding to the order Anfn having a value (Anrf) (t), the time duration of the voltage pulse corresponding to the order A11-WF1 having a value of (An-1rl*1)(t), the time duration of the voltage pulse corresponding to the order A2r2 having a value of (Azrz) (t), the time duration of the voltage pulse corresponding to A1r1 having a value of (Air) (t) and the time duration of the voltage pulse corresponding to the order Ao having a value of AOU), means for sequentially combining said second voltage pulses to produce a third voltage pulse having a duration equal to the sum of the durations of said second voltage pulses, and means to register in M radix all of those rst voltage pulses which occur during the time period of third voltage pulse.

2. Apparatus for changing a number expressed in binary form to a number expressed in decimal form comprising a bank of gate generator means for each place of they decimal number equal to the highest order place of the binary number, a gate generator for each place of the decimal number which is equal to each place of the binary number, the gate generators corresponding to the lowest order place of each of the decimal numbers which are equal to each place of the binary number making up the lowest order bank, the gate generators corresponding to the next highest order decimal places of the decimal numbers equal to the binary places making up the next highest order bank, etc.; each of said gate generator means having selector means which in one position of operation will cause the gate generator to produce its output and in the other position of operation will prevent the gate generator from producing its output, each of said gate generators producing a pulse having a time duration representative of the number in its corresponding place of the decimal number which it represents, means to sequentially add the output of the gate generators of each bank, a gating means for each bank of gate generators having means to apply the output of each bank to its corresponding gate whereby each gate will permit its input signals to be passed to its output circuit during the time that its corresponding bank produces an output pulse, means to apply to each of said gating means a series of first voltage pulses, pulse responsive means in the output of each gating means, and indicating means in the output circuit of each pulse responsive means, said pulse responsive means causing the indicating means in its output circuit to indicate the total number of pulses in the output circuit of the gating means up to nine pulses and to produce a carry pulse for each tenth applied pulse, means to apply the carry pulses produced by each pulse responsive means to the input of the next higher order pulse responsive means, whereby said indicating means will indicate the decimal number which is equal to the binary number to be converted.

3. Apparatus for producing a series of electrical pulses equal to the quantity expressed by a binary number, comprising: means for producing a series of pulses having a repetition period t; a number of gate producing means equal to the number of places in said binary number and each corresponding to one of said places, the gate produced by each of said gate producing means being equal in duration to t times the power of 2 represented by the corresponding place of said binary number; presettable selector means connected to each of said gate producing means, each selector means having two positions, one corresponding to the binary coeicient 1 and the other corresponding to the binary coeicient 0; means acting through said selector means after said selector means have been preset for producing successive operation of those gate producing means for which the selector means are in the 1 position; and means for applying to an output circuit those of said series of pulses occurring during the successive gates produced by said successively operated gate producing means.

4. Apparatus for changing a binary number into a decimal number, comprising: a decimal counter having electrical pulse input circuits to n columns starting with the lowest order column; n coincidence circuits one of which is connected to each of said column inputs; means for applying a series of electrical pulses having a repetition period t to said coincidence circuits in parallel; n banks of gate generators, each bank corresponding to one of said counter columns having input circuits; the number of gate generators in each bank being equal to the number of places in the binary number the individual values of which expressed as decimal numbers have a number of places equal to or greater than the number of the decimal counter column to which the bank corresponds, each of said gate generators corresponding to one of said binary places; each of said gate generators being adjusted to produce a gate equal in duration to t times the quantity in the same column of the said decimal number expressing the value of the binary place to which the gate generator corresponds as the column in said decimal counter to which the bank containing said generator corresponds; selector means connected to each gate generator, each selector means having two positions, one corresponding to the binary coeicient 1 and the other to the binary coefficient O; means operating simultaneously in each bank and acting through said selector means for producing successive operation of those gate circuits for which the selector means are in the 1 position; and means for applying the successively occurring gates produced by said successively operated gate circuits in each bank to the coincidence circuit connected to the input circuit of the decimal column to which the bank corresponds.

References Cited in the le of this patent UNITED STATES PATENTS 2,403,873 Murnma July 9, 1946 2,404,047 Flory July 16, 1946 2,405,597 Miller Aug. 13, 1946 2,422,698 Miller June 24, 1947 2,516,189 Dinsrnore July 25, 1950 2,570,220 Earp Oct. 9, 1951 2,603,123 Loukomsky July l5, 1952 2,634,052 Bloch Apr. 7, 1953 

